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This section describes how the remote protocol is applied to specific target architectures. Also see Standard Target Features, for details of XML target descriptions for each architecture.
These breakpoint kinds are defined for the `Z0' and `Z1' packets.
The following g
/G
packets have previously been defined.
In the below, some thirty-two bit registers are transferred as
sixty-four bits. Those registers should be zero/sign extended (which?)
to fill the space allocated. Register bytes are transferred in target
byte order. The two nibbles within a register byte are transferred
most-significant - least-significant.
sr
). The ordering is the same
as MIPS32
.