Performance requirements of proposed ATLAS second level trigger architectures from simple models
Paper: 279
Session: B (talk)
Speaker: George, Simon, Royal Holloway and Bedford New College, Egham
Keywords: data acquisition systems, simulation, trigger systems
Performance requirements of proposed ATLAS second
level trigger architectures from simple models.
M. Dobson, S. George, J. A. Strong, Q. Zhu
Royal Holloway and Bedford New College, University of London, UK
A. Kugel, R. Männer, K.-H. Noffz
Universität Mannheim, Germany
R. J. Dankers, J. C. Vermeulen
NIKHEF, Amsterdam, Netherlands
D. Calvet, J.R. Hubbard, P. Le Du, I. Mandjavidze
CEA, DSM/DAPNIA, Centre d'Etudes de Saclay, Gif-sur-Yvette, France
To cope with the expected event rates and data volumes of the LHC and
the ATLAS detector, the ATLAS second level trigger will require
significantly higher communication bandwidths and processing power
than existing HEP experiments.
The LVL2 trigger uses full precision data from the detectors to examine
regions of interest (RoI) identified by the LVL1 trigger. Features are
first extracted from individual sub-detectors, then combined into a
trigger object from each RoI. The event is accepted if the pattern of
objects is found in a menu of trigger requirements, based on the ATLAS
physics requirements.
ATLAS is a general purpose detector which will study physics processes
including Higgs and SUSY particle searches and CP violation in
B-decays. For low luminosity running the trigger will make a full
unguided search of tracking detectors to look for signatures of
interesting B-decays.
The LVL2 trigger design is currently in an RD phase in which several
architectures are being examined. In this paper, models of single and
dual farm architectures, including systems consisting partially of
FPGA based hardware, are considered together with different processing
strategies, for example serial and parallel processing of objects.
The expected rates and patterns of the LVL1 RoI types are taken
from the LVL1 trigger menu. Simple models based on first order
calculations are then used to estimate the rates and loads
inside the LVL2 trigger system. The requirements of different
trigger architectures and processing strategies are
discussed. Basic latency calculations have also been made.